Controllers

This model shows two (independent) control loops whose controllers share the same CPU. The control loops are chosen such that it is unstable if the control signals are constantly delayed. By choosing different priority assignments and TM scheduling policies, different stability of the two loops may appear. For example, a nonpreemptive scheduling can stablize both control loops, but none of the preemptive ones can.

The Controllers diagram model can be created in the Ptolemy II schematic editor called Vergil, as shown below:

The inside of the TM controllers composite actor is shown below:

Note: Unfortunately, plotting the schedule from within an applet does not yet work.